ACADEMICS
Course Details
ELE 432 Advanced Digital Design
2017-2018 Spring term information
The course is open this term
| Supervisor(s): | Dr. Ali Ziya Alkar | |
| Assistant(s): | Mevlüt Said Saraçoğlu Serkan Gülmez | |
| Place | Day | Hours |
|---|---|---|
| E6 | Monday | 09:00 - 11:45 |
Timing data are obtained using weekly schedule program tables. To make sure whether the course is cancelled or time-shifted for a specific week one should consult the supervisor and/or follow the announcements.
Course definition tables are extracted from the ECTS Course Catalog web site of Hacettepe University (http://ects.hacettepe.edu.tr) in real-time and displayed here. Please check the appropriate page on the original site against any technical problems.
ELE432 - ADVANCED DIGITAL DESIGN
| Course Name | Code | Semester | Theory (hours/week) |
Application (hours/week) |
Credit | ECTS |
|---|---|---|---|---|---|---|
| ADVANCED DIGITAL DESIGN | ELE432 | 8th Semester | 3 | 2 | 4 | 7 |
| Prerequisite(s) | ELE336 Microprocessor Architecture and Programming | |||||
| Course language | English | |||||
| Course type | Elective | |||||
| Mode of Delivery | Face-to-Face | |||||
| Learning and teaching strategies | Lecture Question and Answer Problem Solving Project Design/Management | |||||
| Instructor (s) | Faculty members | |||||
| Course objective | It is a course designed for students who would like to reach to a higher point in digital circuit design. It includes reminders about the hardware description languages. Following this, the course has teachings in FPGA design. Synthesis is explained from the point of view of design perspective to produce more correct results in terms of digital design. Testing is also explained which is very important in providing robustness. IP blocks are also thought for the sake of fast generation of projects. Some of the topics thought are implemented in the FPGA?s. | |||||
| Learning outcomes |
| |||||
| Course Content | Overview of Combinational Logic and Sequential Logic Advanced Hardware Description Languages (VHDL, Verilog etc.) Design for Synthesis Finite State Machines Guidelines for Advanced Digital Design Design for Test (DFT) Perform synthesis, place and route of a digital design into a target programmable gate array. Embedding and using a programmable microcontroller in a programmable gate array Using Intellectual Property (IP) blocks | |||||
| References | Navabi, Zinalabedin. VHDL: Analysis and Modeling of Digital Systems, McGraw Hill. VHDL Design: Representation and Synthesis, by J. Armstrong and F. G. Gray, 2000 Roth C, John L, Digital System Design using VHDL, Nelson Eng., Advanced FPGA design, IEEE | |||||
Course outline weekly
| Weeks | Topics |
|---|---|
| Week 1 | Overview of Combinational Logic and Sequential Logic |
| Week 2 | Advanced Hardware Description Languages (VHDL, Verilog etc.) |
| Week 3 | Design for Synthesis |
| Week 4 | Finite State Machines |
| Week 5 | Guidelines for Advanced Digital Design |
| Week 6 | Design for Test (DFT) |
| Week 7 | Perform synthesis, place and route of a digital design into a target programmable gate array. |
| Week 8 | Embedding and using a programmable microcontroller in a programmable gate array |
| Week 9 | Using Intellectual Property (IP) blocks |
| Week 10 | Serial I/O applications |
| Week 11 | Advanced FPGA applications |
| Week 12 | Project presentations |
| Week 13 | Project presentations |
| Week 14 | Project presentations |
| Week 15 | Preparation for Final exam |
| Week 16 | Final exam |
Assesment methods
| Course activities | Number | Percentage |
|---|---|---|
| Attendance | 0 | 0 |
| Laboratory | 0 | 0 |
| Application | 0 | 0 |
| Field activities | 0 | 0 |
| Specific practical training | 0 | 0 |
| Assignments | 1 | 30 |
| Presentation | 0 | 0 |
| Project | 1 | 30 |
| Seminar | 0 | 0 |
| Midterms | 1 | 40 |
| Final exam | 1 | 60 |
| Total | 160 | |
| Percentage of semester activities contributing grade succes | 0 | 60 |
| Percentage of final exam contributing grade succes | 0 | 40 |
| Total | 100 | |
Workload and ECTS calculation
| Activities | Number | Duration (hour) | Total Work Load |
|---|---|---|---|
| Course Duration (x14) | 14 | 3 | 42 |
| Laboratory | 14 | 2 | 28 |
| Application | 0 | 0 | 0 |
| Specific practical training | 0 | 0 | 0 |
| Field activities | 0 | 0 | 0 |
| Study Hours Out of Class (Preliminary work, reinforcement, ect) | 14 | 3 | 42 |
| Presentation / Seminar Preparation | 0 | 0 | 0 |
| Project | 1 | 25 | 25 |
| Homework assignment | 8 | 6 | 48 |
| Midterms (Study duration) | 0 | 0 | 0 |
| Final Exam (Study duration) | 1 | 25 | 25 |
| Total Workload | 52 | 64 | 210 |
Matrix Of The Course Learning Outcomes Versus Program Outcomes
| D.9. Key Learning Outcomes | Contrubition level* | ||||
|---|---|---|---|---|---|
| 1 | 2 | 3 | 4 | 5 | |
| 1. PO1. Possesses the theoretical and practical knowledge required in Electrical and Electronics Engineering discipline. | X | ||||
| 2. PO2. Utilizes his/her theoretical and practical knowledge in the fields of mathematics, science and electrical and electronics engineering towards finding engineering solutions. | X | ||||
| 3. PO3. Determines and defines a problem in electrical and electronics engineering, then models and solves it by applying the appropriate analytical or numerical methods. | X | ||||
| 4. PO4. Designs a system under realistic constraints using modern methods and tools. | X | ||||
| 5. PO5. Designs and performs an experiment, analyzes and interprets the results. | X | ||||
| 6. PO6. Possesses the necessary qualifications to carry out interdisciplinary work either individually or as a team member. | X | ||||
| 7. PO7. Accesses information, performs literature search, uses databases and other knowledge sources, follows developments in science and technology. | X | ||||
| 8. PO8. Performs project planning and time management, plans his/her career development. | X | ||||
| 9. PO9. Possesses an advanced level of expertise in computer hardware and software, is proficient in using information and communication technologies. | X | ||||
| 10. PO10. Is competent in oral or written communication; has advanced command of English. | X | ||||
| 11. PO11. Has an awareness of his/her professional, ethical and social responsibilities. | X | ||||
| 12. PO12. Has an awareness of the universal impacts and social consequences of engineering solutions and applications; is well-informed about modern-day problems. | X | ||||
| 13. PO13. Is innovative and inquisitive; has a high level of professional self-esteem. | X | ||||
*1 Lowest, 2 Low, 3 Average, 4 High, 5 Highest